Anandaraj D

Mr. Anandaraj has a Master of Science in Electronics Science from Bangalore University, Bangalore (1998) and MS (Engg) in Avionics from Jain University, Bangalore (2016).

From 2000 he has worked at Flosolver Unit NAL, on design & development, custom built communication protocol for the custom high speed data communication hardware system for Flosolver series of parallel computers (Flosolver Mk6, Flosolver Mk7 and Flosolver Mk8) and on integration & testing of these parallel computers.

He is currently as a Senior Scientist at the Aerospace Electronics and Systems Division (ALD). Presently he is part of the SARAS Avionics team, and also working on FPGA based ARINC 818 IP core for DO-254 certification.

His main interests are in design & development of communication protocols, FPGA design, certification of FPGA IP cores, Avionics systems and customized data communication system for parallel computing.